Progress report L2STTMarch 2000
  - Eight VIPA crates were ordered from Rittal;  
  - began preliminary work on the FRC design;
  - Monte Carlo studies of the effects of L1CTT track list truncation
    continued;
  - continued design of STT motherboard;
  - prototype of PCB for link receiver card in hand;
  - continued to refine specifications for  STC (data format, buffers,..)
  - continued design of VHDL code for STC (strip reader, cluster finder,
    hit filter);
      incorporated changes in cluster finding algorithm;
      compared different ways for optimizing design for the hit filter. 
  - solved some of the problems in the STT simulator (e.g. use
    RawDataChunk instead of  UnpDataChunk for SMT input);  
  - Debugging track fitting in STT simulator;  
  - Continuing design and layout of TFC card;  
  - did assembly precision tolerance study;  
  - 3 members of group attended VHDL classes;